forked from github-mirrors/ale
158 lines
6.1 KiB
Plaintext
158 lines
6.1 KiB
Plaintext
===============================================================================
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ALE VHDL Integration *ale-vhdl-options*
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===============================================================================
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ALE can use four different linters for VHDL:
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ghdl:
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Using `ghdl --std=08`
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ModelSim/Questa
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Using `vcom -2008 -quiet -lint`
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Vivado
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Using `xvhdl --2008`
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HDL Checker
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Using `hdl_checker --lsp`
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===============================================================================
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General notes
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ghdl, ModelSim/Questa and Vivado linters default to VHDL-2008 support. This,
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and other options, can be changed with each linter's respective option
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variable.
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Linters/compilers that utilize a "work" directory for analyzing designs- such
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as ModelSim and Vivado- can be passed the location of these directories as
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part of their respective option strings listed below. This is useful for
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holistic analysis of a file (e.g. a design with components, packages, or other
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code defined external to the current file as part of a larger project) or
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when wanting to simply pass an alternative location for the auto-generated
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work directories (such as '/tmp') so as to not muddle the current directory.
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Since these type of linters often use this work directory for holding compiled
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design data as part of a single build process, they sometimes cannot handle
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the frequent, asynchronous application launches when linting while text is
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changing. This can happen in the form of hangs or crashes. To help prevent
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this when using these linters, it may help to run linting less frequently; for
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example, only when a file is saved.
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HDL Checker is an alternative for some of the issues described above. It wraps
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around ghdl, Vivado and ModelSim/Questa and, when using the latter, it can
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handle mixed language (VHDL, Verilog, SystemVerilog) designs.
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===============================================================================
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ghdl *ale-vhdl-ghdl*
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g:ale_vhdl_ghdl_executable *g:ale_vhdl_ghdl_executable*
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*b:ale_vhdl_ghdl_executable*
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Type: |String|
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Default: `'ghdl'`
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This variable can be changed to the path to the 'ghdl' executable.
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g:ale_vhdl_ghdl_options *g:ale_vhdl_ghdl_options*
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*b:ale_vhdl_ghdl_options*
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Type: |String|
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Default: `'--std=08'`
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This variable can be changed to modify the flags/options passed to 'ghdl'.
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===============================================================================
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hdl-checker *ale-vhdl-hdl-checker*
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HDL Checker is a wrapper for VHDL/Verilg/SystemVerilog tools that aims to
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reduce the boilerplate code needed to set things up. It can automatically
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infer libraries for VHDL sources, determine the compilation order and provide
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some static checks.
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You can install it using pip:
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>
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$ pip install hdl-checker
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`hdl-checker` will be run from a detected project root, determined by the
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following methods, in order:
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1. Find the first directory containing a configuration file (see
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|g:ale_hdl_checker_config_file|)
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2. If no configuration file can be found, find the first directory containing
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a folder named `'.git'
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3. If no such folder is found, use the directory of the current buffer
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g:ale_hdl_checker_executable
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*g:ale_hdl_checker_executable*
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*b:ale_hdl_checker_executable*
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Type: |String|
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Default: `'hdl_checker'`
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This variable can be changed to the path to the 'hdl_checker' executable.
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g:ale_hdl_checker_options *g:ale_hdl_checker_options*
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*b:ale_hdl_checker_options*
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Type: |String|
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Default: `''`
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This variable can be changed to modify the flags/options passed to the
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'hdl_checker' server startup command.
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g:ale_hdl_checker_config_file *g:ale_hdl_checker_config_file*
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*b:ale_hdl_checker_config_file*
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Type: |String|
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Default: `'.hdl_checker.config'` (Unix),
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`'_hdl_checker.config'` (Windows)
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This variable can be changed to modify the config file HDL Checker will try
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to look for. It will also affect how the project's root directory is
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determined (see |ale-vhdl-hdl-checker|).
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More info on the configuration file format can be found at:
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https://github.com/suoto/hdl_checker/wiki/Setting-up-a-project
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===============================================================================
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vcom *ale-vhdl-vcom*
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g:ale_vhdl_vcom_executable *g:ale_vhdl_vcom_executable*
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*b:ale_vhdl_vcom_executable*
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Type: |String|
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Default: `'vcom'`
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This variable can be changed to the path to the 'vcom' executable.
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g:ale_vhdl_vcom_options *g:ale_vhdl_vcom_options*
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*b:ale_vhdl_vcom_options*
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Type: |String|
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Default: `'-2008 -quiet -lint'`
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This variable can be changed to modify the flags/options passed to 'vcom'.
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===============================================================================
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xvhdl *ale-vhdl-xvhdl*
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g:ale_vhdl_xvhdl_executable *g:ale_vhdl_xvhdl_executable*
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*b:ale_vhdl_xvhdl_executable*
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Type: |String|
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Default: `'xvhdl'`
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This variable can be changed to the path to the 'xvhdl' executable.
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g:ale_vhdl_xvhdl_options *g:ale_vhdl_xvhdl_options*
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*b:ale_vhdl_xvhdl_options*
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Type: |String|
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Default: `'--2008'`
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This variable can be changed to modify the flags/options passed to 'xvhdl'.
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===============================================================================
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vim:tw=78:ts=2:sts=2:sw=2:ft=help:norl:
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