Add VHDL Support & Newer Verilog Linters (#2229)

* Added VHDL file support with ghdl compiler
* Update ghdl.vim
* Create vcom.vim
* Create xvhdl.vim
* Update xvlog.vim
* Added documentation for VHDL & Verilog linters
* Added tests to VHDL & Verilog linters
This commit is contained in:
John Gentile 2019-01-27 04:46:33 -05:00 committed by w0rp
parent 91c1fc3bb3
commit b8bf7b220d
20 changed files with 569 additions and 4 deletions

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@ -201,7 +201,8 @@ formatting.
| Thrift | [thrift](http://thrift.apache.org/) |
| TypeScript | [eslint](http://eslint.org/), [prettier](https://github.com/prettier/prettier), [tslint](https://github.com/palantir/tslint), [tsserver](https://github.com/Microsoft/TypeScript/wiki/Standalone-Server-%28tsserver%29), typecheck |
| VALA | [uncrustify](https://github.com/uncrustify/uncrustify) |
| Verilog | [iverilog](https://github.com/steveicarus/iverilog), [verilator](http://www.veripool.org/projects/verilator/wiki/Intro) |
| Verilog | [iverilog](https://github.com/steveicarus/iverilog), [verilator](http://www.veripool.org/projects/verilator/wiki/Intro), [vlog](https://www.mentor.com/products/fv/questa/), [xvlog](https://www.xilinx.com/products/design-tools/vivado.html) |
| VHDL | [ghdl](https://github.com/ghdl/ghdl), [vcom](https://www.mentor.com/products/fv/questa/), [xvhdl](https://www.xilinx.com/products/design-tools/vivado.html) |
| Vim | [vint](https://github.com/Kuniwak/vint) |
| Vim help^ | [alex](https://github.com/wooorm/alex) !!, [proselint](http://proselint.com/), [write-good](https://github.com/btford/write-good) |
| Vue | [prettier](https://github.com/prettier/prettier), [vls](https://github.com/vuejs/vetur/tree/master/server) |

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@ -0,0 +1,36 @@
" Author: John Gentile <johncgentile17@gmail.com>
" Description: Adds support for Mentor Graphics Questa/ModelSim `vlog` Verilog compiler/checker
call ale#Set('verilog_vlog_executable', 'vlog')
" See `$ vlog -h` for more options
call ale#Set('verilog_vlog_options', '-quiet -lint')
function! ale_linters#verilog#vlog#GetCommand(buffer) abort
return '%e ' . ale#Pad(ale#Var(a:buffer, 'verilog_vlog_options')) . ' %t'
endfunction
function! ale_linters#verilog#vlog#Handle(buffer, lines) abort
"Matches patterns like the following:
"** Warning: add.v(7): (vlog-2623) Undefined variable: C.
"** Error: file.v(1): (vlog-13294) Identifier must be declared with a port mode: C.
let l:pattern = '^**\s\(\w*\):[a-zA-Z0-9\-\.\_\/ ]\+(\(\d\+\)):\s\+\(.*\)'
let l:output = []
for l:match in ale#util#GetMatches(a:lines, l:pattern)
call add(l:output, {
\ 'lnum': l:match[2] + 0,
\ 'type': l:match[1] is? 'Error' ? 'E' : 'W',
\ 'text': l:match[3],
\})
endfor
return l:output
endfunction
call ale#linter#Define('verilog', {
\ 'name': 'vlog',
\ 'output_stream': 'stdout',
\ 'executable_callback': ale#VarFunc('verilog_vlog_executable'),
\ 'command_callback': 'ale_linters#verilog#vlog#GetCommand',
\ 'callback': 'ale_linters#verilog#vlog#Handle',
\})

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@ -0,0 +1,35 @@
" Author: John Gentile <johncgentile17@gmail.com>
" Description: Adds support for Xilinx Vivado `xvlog` Verilog compiler/checker
call ale#Set('verilog_xvlog_executable', 'xvlog')
call ale#Set('verilog_xvlog_options', '')
function! ale_linters#verilog#xvlog#GetCommand(buffer) abort
return '%e ' . ale#Pad(ale#Var(a:buffer, 'verilog_xvlog_options')) . ' %t'
endfunction
function! ale_linters#verilog#xvlog#Handle(buffer, lines) abort
"Matches patterns like the following:
" ERROR: [VRFC 10-1412] syntax error near output [/path/to/file.v:5]
let l:pattern = '^ERROR:\s\+\(\[.*\)\[.*:\([0-9]\+\)\]'
let l:output = []
" NOTE: `xvlog` only prints 'INFO' and 'ERROR' messages
for l:match in ale#util#GetMatches(a:lines, l:pattern)
call add(l:output, {
\ 'lnum': l:match[2] + 0,
\ 'type': 'E',
\ 'text': l:match[1],
\})
endfor
return l:output
endfunction
call ale#linter#Define('verilog', {
\ 'name': 'xvlog',
\ 'output_stream': 'stdout',
\ 'executable_callback': ale#VarFunc('verilog_xvlog_executable'),
\ 'command_callback': 'ale_linters#verilog#xvlog#GetCommand',
\ 'callback': 'ale_linters#verilog#xvlog#Handle',
\})

37
ale_linters/vhdl/ghdl.vim Normal file
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@ -0,0 +1,37 @@
" Author: John Gentile <johncgentile17@gmail.com>
" Description: Adds support for `ghdl` VHDL compiler/checker
call ale#Set('vhdl_ghdl_executable', 'ghdl')
" Compile w/VHDL-2008 support
call ale#Set('vhdl_ghdl_options', '--std=08')
function! ale_linters#vhdl#ghdl#GetCommand(buffer) abort
return '%e -s ' . ale#Pad(ale#Var(a:buffer, 'vhdl_ghdl_options')) . ' %t'
endfunction
function! ale_linters#vhdl#ghdl#Handle(buffer, lines) abort
" Look for 'error' lines like the following:
" dff_en.vhd:41:5:error: 'begin' is expected instead of 'if'
" /path/to/file.vhdl:12:8: no declaration for "i0"
let l:pattern = '^[a-zA-Z0-9\-\.\_\/ ]\+:\(\d\+\):\(\d\+\):\(.*\)'
let l:output = []
for l:match in ale#util#GetMatches(a:lines, l:pattern)
call add(l:output, {
\ 'lnum': l:match[1] + 0,
\ 'col' : l:match[2] + 0,
\ 'text': l:match[3],
\ 'type': 'E',
\})
endfor
return l:output
endfunction
call ale#linter#Define('vhdl', {
\ 'name': 'ghdl',
\ 'output_stream': 'stderr',
\ 'executable_callback': ale#VarFunc('vhdl_ghdl_executable'),
\ 'command_callback': 'ale_linters#vhdl#ghdl#GetCommand',
\ 'callback': 'ale_linters#vhdl#ghdl#Handle',
\})

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ale_linters/vhdl/vcom.vim Normal file
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@ -0,0 +1,38 @@
" Author: John Gentile <johncgentile17@gmail.com>
" Description: Adds support for Mentor Graphics Questa/ModelSim `vcom` VHDL compiler/checker
call ale#Set('vhdl_vcom_executable', 'vcom')
" Use VHDL-2008. See `$ vcom -h` for more options
call ale#Set('vhdl_vcom_options', '-2008 -quiet -lint')
function! ale_linters#vhdl#vcom#GetCommand(buffer) abort
return '%e ' . ale#Pad(ale#Var(a:buffer, 'vhdl_vcom_options')) . ' %t'
endfunction
function! ale_linters#vhdl#vcom#Handle(buffer, lines) abort
"Matches patterns like the following:
"** Warning: ../path/to/file.vhd(218): (vcom-1236) Shared variables must be of a protected type.
"** Error: tb_file.vhd(73): (vcom-1136) Unknown identifier "aresetn".
"** Error: tb_file.vhd(73): Bad resolution function (STD_LOGIC) for type (error).
"** Error: tb_file.vhd(73): near ":": (vcom-1576) expecting ';' or ')'.
let l:pattern = '^**\s\(\w*\):[a-zA-Z0-9\-\.\_\/ ]\+(\(\d\+\)):\s\+\(.*\)'
let l:output = []
for l:match in ale#util#GetMatches(a:lines, l:pattern)
call add(l:output, {
\ 'lnum': l:match[2] + 0,
\ 'type': l:match[1] is? 'Error' ? 'E' : 'W',
\ 'text': l:match[3],
\})
endfor
return l:output
endfunction
call ale#linter#Define('vhdl', {
\ 'name': 'vcom',
\ 'output_stream': 'stdout',
\ 'executable_callback': ale#VarFunc('vhdl_vcom_executable'),
\ 'command_callback': 'ale_linters#vhdl#vcom#GetCommand',
\ 'callback': 'ale_linters#vhdl#vcom#Handle',
\})

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@ -0,0 +1,37 @@
" Author: John Gentile <johncgentile17@gmail.com>
" Description: Adds support for Xilinx Vivado `xvhdl` VHDL compiler/checker
call ale#Set('vhdl_xvhdl_executable', 'xvhdl')
" Use VHDL-2008. See `$ xvhdl -h` for more options
call ale#Set('vhdl_xvhdl_options', '--2008')
function! ale_linters#vhdl#xvhdl#GetCommand(buffer) abort
return '%e ' . ale#Pad(ale#Var(a:buffer, 'vhdl_xvhdl_options')) . ' %t'
endfunction
function! ale_linters#vhdl#xvhdl#Handle(buffer, lines) abort
"Matches patterns like the following:
" ERROR: [VRFC 10-91] aresetn is not declared [/path/to/file.vhd:17]
" ERROR: [VRFC 10-91] m_axis_tx_tdata is not declared [/home/user/tx_data.vhd:128]
let l:pattern = '^ERROR:\s\+\(\[.*\)\[.*:\([0-9]\+\)\]'
let l:output = []
" NOTE: `xvhdl` only prints 'INFO' and 'ERROR' messages
for l:match in ale#util#GetMatches(a:lines, l:pattern)
call add(l:output, {
\ 'lnum': l:match[2] + 0,
\ 'type': 'E',
\ 'text': l:match[1],
\})
endfor
return l:output
endfunction
call ale#linter#Define('vhdl', {
\ 'name': 'xvhdl',
\ 'output_stream': 'stdout',
\ 'executable_callback': ale#VarFunc('vhdl_xvhdl_executable'),
\ 'command_callback': 'ale_linters#vhdl#xvhdl#GetCommand',
\ 'callback': 'ale_linters#vhdl#xvhdl#Handle',
\})

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@ -3,7 +3,7 @@ ALE Verilog/SystemVerilog Integration *ale-verilog-options*
===============================================================================
ALE can use two different linters for Verilog HDL:
ALE can use four different linters for Verilog HDL:
iverilog:
Using `iverilog -t null -Wall`
@ -11,6 +11,12 @@ ALE can use two different linters for Verilog HDL:
verilator
Using `verilator --lint-only -Wall`
ModelSim/Questa
Using `vlog -quiet -lint`
Vivado
Using `xvlog`
By default, both 'verilog' and 'systemverilog' filetypes are checked.
You can limit 'systemverilog' files to be checked using only 'verilator' by
@ -20,6 +26,20 @@ defining 'g:ale_linters' variable:
\ let g:ale_linters = {'systemverilog' : ['verilator'],}
<
Linters/compilers that utilize a "work" directory for analyzing designs- such
as ModelSim and Vivado- can be passed the location of these directories as
part of their respective option strings listed below. This is useful for
holistic analysis of a file (e.g. a design with components, packages, or other
code defined external to the current file as part of a larger project) or
when wanting to simply pass an alternative location for the auto-generated
work directories (such as '/tmp') so as to not muddle the current directory.
Since these type of linters often use this work directory for holding compiled
design data as part of a single build process, they sometimes cannot handle
the frequent, asynchronous application launches when linting while text is
changing. This can happen in the form of hangs or crashes. To help prevent
this when using these linters, it may help to run linting less frequently; for
example, only when a file is saved.
===============================================================================
iverilog *ale-verilog-iverilog*
@ -39,5 +59,44 @@ g:ale_verilog_verilator_options *g:ale_verilog_verilator_options*
For example `'-sv --default-language "1800-2012"'` if you want to enable
SystemVerilog parsing and select the 2012 version of the language.
===============================================================================
vlog *ale-verilog-vlog*
g:ale_verilog_vlog_executable *g:ale_verilog_vlog_executable*
*b:ale_verilog_vlog_executable*
Type: |String|
Default: `'vlog'`
This variable can be changed to the path to the 'vlog' executable.
g:ale_verilog_vlog_options *g:ale_verilog_vlog_options*
*b:ale_verilog_vlog_options*
Type: |String|
Default: `'-quiet -lint'`
This variable can be changed to modify the flags/options passed to 'vlog'.
===============================================================================
xvlog *ale-verilog-xvlog*
g:ale_verilog_xvlog_executable *g:ale_verilog_xvlog_executable*
*b:ale_verilog_xvlog_executable*
Type: |String|
Default: `'xvlog'`
This variable can be changed to the path to the 'xvlog' executable.
g:ale_verilog_xvlog_options *g:ale_verilog_xvlog_options*
*b:ale_verilog_xvlog_options*
Type: |String|
Default: `''`
This variable can be changed to modify the flags/options passed to 'xvlog'.
===============================================================================
vim:tw=78:ts=2:sts=2:sw=2:ft=help:norl:

92
doc/ale-vhdl.txt Normal file
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@ -0,0 +1,92 @@
===============================================================================
ALE VHDL Integration *ale-vhdl-options*
===============================================================================
ALE can use three different linters for VHDL:
iverilog:
Using `iverilog -t null -Wall`
ModelSim/Questa
Using `vcom -2008 -quiet -lint`
Vivado
Using `xvhdl --2008`
Note all linters default to VHDL-2008 support. This, and other options, can be
changed with each linter's respective option variable.
Linters/compilers that utilize a "work" directory for analyzing designs- such
as ModelSim and Vivado- can be passed the location of these directories as
part of their respective option strings listed below. This is useful for
holistic analysis of a file (e.g. a design with components, packages, or other
code defined external to the current file as part of a larger project) or
when wanting to simply pass an alternative location for the auto-generated
work directories (such as '/tmp') so as to not muddle the current directory.
Since these type of linters often use this work directory for holding compiled
design data as part of a single build process, they sometimes cannot handle
the frequent, asynchronous application launches when linting while text is
changing. This can happen in the form of hangs or crashes. To help prevent
this when using these linters, it may help to run linting less frequently; for
example, only when a file is saved.
===============================================================================
ghdl *ale-vhdl-ghdl*
g:ale_vhdl_ghdl_executable *g:ale_vhdl_ghdl_executable*
*b:ale_vhdl_ghdl_executable*
Type: |String|
Default: `'ghdl'`
This variable can be changed to the path to the 'ghdl' executable.
g:ale_vhdl_ghdl_options *g:ale_vhdl_ghdl_options*
*b:ale_vhdl_ghdl_options*
Type: |String|
Default: `'--std=08'`
This variable can be changed to modify the flags/options passed to 'ghdl'.
===============================================================================
vcom *ale-vhdl-vcom*
g:ale_vhdl_vcom_executable *g:ale_vhdl_vcom_executable*
*b:ale_vhdl_vcom_executable*
Type: |String|
Default: `'vcom'`
This variable can be changed to the path to the 'vcom' executable.
g:ale_vhdl_vcom_options *g:ale_vhdl_vcom_options*
*b:ale_vhdl_vcom_options*
Type: |String|
Default: `'-2008 -quiet -lint'`
This variable can be changed to modify the flags/options passed to 'vcom'.
===============================================================================
xvhdl *ale-vhdl-xvhdl*
g:ale_vhdl_xvhdl_executable *g:ale_vhdl_xvhdl_executable*
*b:ale_vhdl_xvhdl_executable*
Type: |String|
Default: `'xvhdl'`
This variable can be changed to the path to the 'xvhdl' executable.
g:ale_vhdl_xvhdl_options *g:ale_vhdl_xvhdl_options*
*b:ale_vhdl_xvhdl_options*
Type: |String|
Default: `'--2008'`
This variable can be changed to modify the flags/options passed to 'xvhdl'.
===============================================================================
vim:tw=78:ts=2:sts=2:sw=2:ft=help:norl:

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@ -348,6 +348,12 @@ CONTENTS *ale-contents*
verilog/systemverilog.................|ale-verilog-options|
iverilog............................|ale-verilog-iverilog|
verilator...........................|ale-verilog-verilator|
vlog................................|ale-verilog-vlog|
xvlog...............................|ale-verilog-xvlog|
vhdl..................................|ale-vhdl-options|
ghdl................................|ale-vhdl-ghdl|
vcom................................|ale-vhdl-vcom|
xvhdl...............................|ale-vhdl-xvhdl|
vim...................................|ale-vim-options|
vint................................|ale-vim-vint|
vim help..............................|ale-vim-help-options|
@ -511,7 +517,8 @@ Notes:
* Thrift: `thrift`
* TypeScript: `eslint`, `prettier`, `tslint`, `tsserver`, `typecheck`
* VALA: `uncrustify`
* Verilog: `iverilog`, `verilator`
* Verilog: `iverilog`, `verilator`, `vlog`, `xvlog`
* VHDL: `ghdl`, `vcom`, `xvhdl`
* Vim: `vint`
* Vim help^: `alex`!!, `proselint`, `write-good`
* Vue: `prettier`, `vls`

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@ -0,0 +1,19 @@
Before:
call ale#assert#SetUpLinterTest('vhdl', 'ghdl')
After:
unlet! b:command_tail
call ale#assert#TearDownLinterTest()
Execute(The executable should be configurable):
AssertLinter 'ghdl', ale#Escape('ghdl') . ' -s --std=08 %t'
let b:ale_vhdl_ghdl_executable = 'foobar'
AssertLinter 'foobar', ale#Escape('foobar') . ' -s --std=08 %t'
Execute(The options should be configurable):
let b:ale_vhdl_ghdl_options = '--something'
AssertLinter 'ghdl', ale#Escape('ghdl') . ' -s --something %t'

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@ -0,0 +1,19 @@
Before:
call ale#assert#SetUpLinterTest('vhdl', 'vcom')
After:
unlet! b:command_tail
call ale#assert#TearDownLinterTest()
Execute(The executable should be configurable):
AssertLinter 'vcom', ale#Escape('vcom') . ' -2008 -quiet -lint %t'
let b:ale_vhdl_vcom_executable = 'foobar'
AssertLinter 'foobar', ale#Escape('foobar') . ' -2008 -quiet -lint %t'
Execute(The options should be configurable):
let b:ale_vhdl_vcom_options = '--something'
AssertLinter 'vcom', ale#Escape('vcom') . ' --something %t'

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@ -0,0 +1,19 @@
Before:
call ale#assert#SetUpLinterTest('verilog', 'vlog')
After:
unlet! b:command_tail
call ale#assert#TearDownLinterTest()
Execute(The executable should be configurable):
AssertLinter 'vlog', ale#Escape('vlog') . ' -quiet -lint %t'
let b:ale_verilog_vlog_executable = 'foobar'
AssertLinter 'foobar', ale#Escape('foobar') . ' -quiet -lint %t'
Execute(The options should be configurable):
let b:ale_verilog_vlog_options = '--something'
AssertLinter 'vlog', ale#Escape('vlog') . ' --something %t'

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@ -0,0 +1,19 @@
Before:
call ale#assert#SetUpLinterTest('vhdl', 'xvhdl')
After:
unlet! b:command_tail
call ale#assert#TearDownLinterTest()
Execute(The executable should be configurable):
AssertLinter 'xvhdl', ale#Escape('xvhdl') . ' --2008 %t'
let b:ale_vhdl_xvhdl_executable = 'foobar'
AssertLinter 'foobar', ale#Escape('foobar') . ' --2008 %t'
Execute(The options should be configurable):
let b:ale_vhdl_xvhdl_options = '--something'
AssertLinter 'xvhdl', ale#Escape('xvhdl') . ' --something %t'

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@ -0,0 +1,19 @@
Before:
call ale#assert#SetUpLinterTest('verilog', 'xvlog')
After:
unlet! b:command_tail
call ale#assert#TearDownLinterTest()
Execute(The executable should be configurable):
AssertLinter 'xvlog', ale#Escape('xvlog') . ' %t'
let b:ale_verilog_xvlog_executable = 'foobar'
AssertLinter 'foobar', ale#Escape('foobar') . ' %t'
Execute(The options should be configurable):
let b:ale_verilog_xvlog_options = '--something'
AssertLinter 'xvlog', ale#Escape('xvlog') . ' --something %t'

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@ -0,0 +1,26 @@
Before:
runtime ale_linters/vhdl/ghdl.vim
After:
call ale#linter#Reset()
Execute(The ghdl handler should parse lines correctly):
AssertEqual
\ [
\ {
\ 'lnum': 41,
\ 'col' : 5,
\ 'type': 'E',
\ 'text': "error: 'begin' is expected instead of 'if'"
\ },
\ {
\ 'lnum': 12,
\ 'col' : 8,
\ 'type': 'E',
\ 'text': ' no declaration for "i0"'
\ },
\ ],
\ ale_linters#vhdl#ghdl#Handle(bufnr(''), [
\ "dff_en.vhd:41:5:error: 'begin' is expected instead of 'if'",
\ '/path/to/file.vhdl:12:8: no declaration for "i0"',
\ ])

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@ -0,0 +1,36 @@
Before:
runtime ale_linters/vhdl/vcom.vim
After:
call ale#linter#Reset()
Execute(The vcom handler should parse lines correctly):
AssertEqual
\ [
\ {
\ 'lnum': 218,
\ 'type': 'W',
\ 'text': '(vcom-1236) Shared variables must be of a protected type.'
\ },
\ {
\ 'lnum': 73,
\ 'type': 'E',
\ 'text': '(vcom-1136) Unknown identifier "aresetn".'
\ },
\ {
\ 'lnum': 73,
\ 'type': 'E',
\ 'text': 'Bad resolution function (STD_LOGIC) for type (error).'
\ },
\ {
\ 'lnum': 73,
\ 'type': 'E',
\ 'text': 'near ":": (vcom-1576) expecting ";" or ")".'
\ },
\ ],
\ ale_linters#vhdl#vcom#Handle(bufnr(''), [
\ '** Warning: ../path/to/file.vhd(218): (vcom-1236) Shared variables must be of a protected type.',
\ '** Error: tb_file.vhd(73): (vcom-1136) Unknown identifier "aresetn".',
\ '** Error: tb_file.vhd(73): Bad resolution function (STD_LOGIC) for type (error).',
\ '** Error: tb_file.vhd(73): near ":": (vcom-1576) expecting ";" or ")".',
\ ])

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@ -0,0 +1,24 @@
Before:
runtime ale_linters/verilog/vlog.vim
After:
call ale#linter#Reset()
Execute(The vlog handler should parse lines correctly):
AssertEqual
\ [
\ {
\ 'lnum': 7,
\ 'type': 'W',
\ 'text': '(vlog-2623) Undefined variable: C.'
\ },
\ {
\ 'lnum': 1,
\ 'type': 'E',
\ 'text': '(vlog-13294) Identifier must be declared with a port mode: C.'
\ },
\ ],
\ ale_linters#verilog#vlog#Handle(bufnr(''), [
\ '** Warning: add.v(7): (vlog-2623) Undefined variable: C.',
\ '** Error: file.v(1): (vlog-13294) Identifier must be declared with a port mode: C.',
\ ])

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@ -0,0 +1,24 @@
Before:
runtime ale_linters/vhdl/xvhdl.vim
After:
call ale#linter#Reset()
Execute(The xvhdl handler should parse lines correctly):
AssertEqual
\ [
\ {
\ 'lnum': 17,
\ 'type': 'E',
\ 'text': '[VRFC 10-91] aresetn is not declared '
\ },
\ {
\ 'lnum': 128,
\ 'type': 'E',
\ 'text': '[VRFC 10-91] m_axis_tx_tdata is not declared '
\ },
\ ],
\ ale_linters#vhdl#xvhdl#Handle(bufnr(''), [
\ 'ERROR: [VRFC 10-91] aresetn is not declared [/path/to/file.vhd:17]',
\ 'ERROR: [VRFC 10-91] m_axis_tx_tdata is not declared [/home/user/tx_data.vhd:128]',
\ ])

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@ -0,0 +1,18 @@
Before:
runtime ale_linters/verilog/xvlog.vim
After:
call ale#linter#Reset()
Execute(The xvlog handler should parse lines correctly):
AssertEqual
\ [
\ {
\ 'lnum': 5,
\ 'type': 'E',
\ 'text': '[VRFC 10-1412] syntax error near output '
\ },
\ ],
\ ale_linters#verilog#xvlog#Handle(bufnr(''), [
\ 'ERROR: [VRFC 10-1412] syntax error near output [/path/to/file.v:5]',
\ ])

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@ -61,7 +61,7 @@ Execute(The defaults for the zsh filetype should be correct):
Execute(The defaults for the verilog filetype should be correct):
" This filetype isn't configured with default, so we can test loading all
" available linters with this.
AssertEqual ['iverilog', 'verilator'], GetLinterNames('verilog')
AssertEqual ['iverilog', 'verilator', 'vlog', 'xvlog'], GetLinterNames('verilog')
let g:ale_linters_explicit = 1